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Merged
tinebp merged 9 commits into from
Sep 27, 2026
Merged

Close the fpga_gate and asic_gate: core/vm timing, dxa drain, baseline refresh #419

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4ac82d8
config: size the LMEM floor to hold a full warp-count CTA group
tinebp Sep 22, 2026
4074bd1
dxa: drain scatters one element per beat again
tinebp Sep 23, 2026
3897cb7
ci: re-record the asic_gate dxa baseline on the current toolchain
tinebp Sep 23, 2026
bb1bb10
core: take the issue arbiter out of the hazard loop and narrow the st…
tinebp Sep 24, 2026
033f025
cache, vm: close the vm DUT at 250 MHz
tinebp Sep 27, 2026
0799d9f
core: decode CSR reads in the cycle the request already waits
tinebp Sep 26, 2026
965010c
fpu: count leading zeros of a negative integer without negating it
tinebp Sep 26, 2026
c0d36e3
ci: record the improved cache and vm synthesis baselines
tinebp Sep 26, 2026
6510044
ci: re-record the tensor synthesis baseline under its pinned strategy
tinebp Sep 26, 2026
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6 changes: 4 additions & 2 deletions VX_config.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -255,8 +255,10 @@ VX_CFG_L3_MEM_PORTS = "expr: min($VX_CFG_L3_NUM_BANKS, $VX_CFG_PLATFORM_MEMORY_N
lmem_bytes_per_bank = 2048
# Narrow cores must keep a usable shared-memory window: scaling capacity with
# bank count alone drops NT=1 to 2KB, below what CTAs that fit every other
# configuration need.
lmem_min_bytes = 8192
# configuration need. The floor holds a full warp-count group of co-resident
# CTAs: kernels that rendezvous across `NUM_WARPS` CTAs -- the DXA multicast
# pattern -- make no progress at all once fewer than the whole group fits.
lmem_min_bytes = 16384
VX_CFG_LMEM_NUM_BANKS = "expr: $VX_CFG_NUM_LSU_LANES"
VX_CFG_LMEM_LOG_SIZE = "expr: clog2(max($lmem_min_bytes, $VX_CFG_LMEM_NUM_BANKS * $lmem_bytes_per_bank))"

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212 changes: 106 additions & 106 deletions ci/baselines/synthesis/xilinx/core.json
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Original file line number Diff line number Diff line change
Expand Up @@ -5,108 +5,108 @@
"configs": "-DVX_CFG_EXT_A_ENABLE",
"dut": "cache",
"result": {
"bram": 89,
"build_time_s": 3348,
"bram": 32,
"build_time_s": 1641,
"critical_paths": [
{
"endpoint": "cache/g_cache.cache/g_banks[2].bank/cache_data/g_data_slice[6].data_store/g_no_asic.g_sync.g_bram.g_read_first.g_wren.ram_reg/ENBWREN",
"endpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.cmp_old_reg[7]/D",
"group": "core_clock",
"levels": 6,
"logic_ns": 1.365,
"route_ns": 1.664,
"route_pct": 54.937,
"slack_ns": -0.109,
"startpoint": "cache/g_cache.cache/g_banks[2].bank/cache_tags/tag_store/g_no_asic.g_sync.g_bram.g_read_first.g_wren.ram_reg_1/CLKARDCLK"
"levels": 7,
"logic_ns": 0.784,
"route_ns": 2.509,
"route_pct": 76.192,
"slack_ns": 0.02,
"startpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.post_wb_addr_reg[4]/C"
},
{
"endpoint": "cache/g_cache.cache/g_banks[2].bank/g_amo.amo/g_commit.cmp_old_reg[39]/D",
"endpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.cmp_old_reg[7]/D",
"group": "core_clock",
"levels": 8,
"logic_ns": 0.851,
"route_ns": 2.571,
"route_pct": 75.131,
"slack_ns": -0.109,
"startpoint": "cache/g_cache.cache/g_banks[2].bank/reg_s1/g_pipe.g_partial_reset.pipe_reg[0][86]/C"
"levels": 7,
"logic_ns": 0.859,
"route_ns": 2.427,
"route_pct": 73.857,
"slack_ns": 0.029,
"startpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.wbq_addr_reg[0][0]/C"
},
{
"endpoint": "cache/g_cache.cache/g_banks[1].bank/core_rsp_queue/g_eb2.stream_buffer/g_buffer.g_out_reg.data_out_r_reg[22]/D",
"endpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.cmp_old_reg[7]/D",
"group": "core_clock",
"levels": 10,
"logic_ns": 0.888,
"route_ns": 2.536,
"route_pct": 74.069,
"slack_ns": -0.109,
"startpoint": "cache/g_cache.cache/g_banks[1].bank/reg_s1/g_pipe.g_partial_reset.pipe_reg[0][82]/C"
"levels": 7,
"logic_ns": 0.82,
"route_ns": 2.447,
"route_pct": 74.898,
"slack_ns": 0.046,
"startpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.wbq_addr_reg[0][16]/C"
},
{
"endpoint": "cache/g_cache.cache/g_banks[2].bank/cache_data/g_data_slice[2].data_store/g_no_asic.g_sync.g_bram.g_read_first.g_wren.ram_reg/ENBWREN",
"endpoint": "cache/g_cache.cache/g_banks[3].bank/core_rsp_queue/g_eb2.stream_buffer/g_buffer.g_out_reg.data_out_r_reg[3]/D",
"group": "core_clock",
"levels": 6,
"logic_ns": 1.365,
"route_ns": 1.663,
"route_pct": 54.922,
"slack_ns": -0.108,
"startpoint": "cache/g_cache.cache/g_banks[2].bank/cache_tags/tag_store/g_no_asic.g_sync.g_bram.g_read_first.g_wren.ram_reg_1/CLKARDCLK"
"levels": 10,
"logic_ns": 0.99,
"route_ns": 2.276,
"route_pct": 69.686,
"slack_ns": 0.048,
"startpoint": "cache/g_cache.cache/g_banks[3].bank/g_amo.amo/g_commit.wbq_addr_reg[1][18]/C"
},
{
"endpoint": "cache/g_cache.cache/g_banks[1].bank/cache_data/g_data_slice[1].data_store/g_no_asic.g_sync.g_bram.g_read_first.g_wren.ram_reg/ENBWREN",
"endpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.cmp_old_reg[7]/D",
"group": "core_clock",
"levels": 5,
"logic_ns": 1.371,
"route_ns": 1.657,
"route_pct": 54.719,
"slack_ns": -0.108,
"startpoint": "cache/g_cache.cache/g_banks[1].bank/cache_tags/tag_store/g_no_asic.g_sync.g_bram.g_read_first.g_wren.ram_reg_0/CLKARDCLK"
"levels": 7,
"logic_ns": 0.756,
"route_ns": 2.495,
"route_pct": 76.746,
"slack_ns": 0.062,
"startpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.wbq_addr_reg[0][21]/C"
},
{
"endpoint": "cache/g_cache.cache/g_banks[0].bank/mem_req_queue/g_depth_n.g_out_reg.data_out_r_reg[455]/CE",
"endpoint": "cache/g_cache.cache/g_banks[0].bank/reg_s1/g_pipe.g_partial_reset.pipe_free_reg[0][28]/D",
"group": "core_clock",
"levels": 8,
"logic_ns": 0.792,
"route_ns": 2.544,
"route_pct": 76.257,
"slack_ns": -0.108,
"startpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.cmp_addr_reg[10]/C"
"logic_ns": 1.012,
"route_ns": 2.234,
"route_pct": 68.826,
"slack_ns": 0.066,
"startpoint": "cache/g_cache.cache/g_banks[0].bank/cache_mshr/mshr_store/g_no_asic.g_sync.g_auto.g_write_first.g_no_wren.raddr_r_reg[0]/C"
},
{
"endpoint": "cache/g_cache.cache/g_banks[2].bank/cache_data/g_data_slice[6].data_store/g_no_asic.g_sync.g_bram.g_read_first.g_wren.ram_reg/ENBWREN",
"endpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.cmp_old_reg[11]/D",
"group": "core_clock",
"levels": 6,
"logic_ns": 1.486,
"route_ns": 1.541,
"route_pct": 50.911,
"slack_ns": -0.107,
"startpoint": "cache/g_cache.cache/g_banks[2].bank/cache_tags/tag_store/g_no_asic.g_sync.g_bram.g_read_first.g_wren.ram_reg_1/CLKARDCLK"
"levels": 7,
"logic_ns": 0.693,
"route_ns": 2.543,
"route_pct": 78.582,
"slack_ns": 0.08,
"startpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.wbq_addr_reg[0][0]/C"
},
{
"endpoint": "cache/g_cache.cache/g_banks[2].bank/cache_data/g_data_slice[6].data_store/g_no_asic.g_sync.g_bram.g_read_first.g_wren.ram_reg/ENBWREN",
"endpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.wbq_byteen_reg[1][5]/D",
"group": "core_clock",
"levels": 6,
"logic_ns": 1.32,
"route_ns": 1.707,
"route_pct": 56.394,
"slack_ns": -0.107,
"startpoint": "cache/g_cache.cache/g_banks[2].bank/cache_tags/tag_store/g_no_asic.g_sync.g_bram.g_read_first.g_wren.ram_reg_1/CLKARDCLK"
"levels": 10,
"logic_ns": 1.032,
"route_ns": 2.2,
"route_pct": 68.065,
"slack_ns": 0.081,
"startpoint": "cache/g_cache.cache/g_banks[0].bank/cache_mshr/dequeue_addr_r_reg[8]/C"
},
{
"endpoint": "cache/g_cache.cache/g_banks[0].bank/mem_req_queue/g_depth_n.g_out_reg.data_out_r_reg[16]/CE",
"endpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.cmp_old_reg[19]/D",
"group": "core_clock",
"levels": 8,
"logic_ns": 0.792,
"route_ns": 2.543,
"route_pct": 76.25,
"slack_ns": -0.107,
"startpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.cmp_addr_reg[10]/C"
"levels": 7,
"logic_ns": 0.739,
"route_ns": 2.494,
"route_pct": 77.142,
"slack_ns": 0.082,
"startpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.wbq_addr_reg[0][0]/C"
},
{
"endpoint": "cache/g_cache.cache/g_banks[0].bank/mem_req_queue/g_depth_n.g_out_reg.data_out_r_reg[36]/CE",
"endpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.cmp_old_reg[7]/D",
"group": "core_clock",
"levels": 8,
"logic_ns": 0.792,
"route_ns": 2.543,
"route_pct": 76.25,
"slack_ns": -0.107,
"startpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.cmp_addr_reg[10]/C"
"levels": 7,
"logic_ns": 0.78,
"route_ns": 2.451,
"route_pct": 75.858,
"slack_ns": 0.082,
"startpoint": "cache/g_cache.cache/g_banks[0].bank/g_amo.amo/g_commit.wbq_addr_reg[0][19]/C"
}
],
"dsp": 0,
Expand All @@ -116,64 +116,64 @@
"vivado": "2024.2",
"xlen": 32
},
"ff": 28583,
"fmax_mhz": 290.5,
"ff": 24689,
"fmax_mhz": 301.8,
"high_fanout_nets": [
{
"driver": "PORT",
"fanout": 892,
"net": "reset"
"driver": "LUT3",
"fanout": 1036,
"net": "cache/g_cache.cache/g_mem_rsp_queue[0].mem_rsp_queue/g_ebN.fifo_queue/pending_size/E[0]"
},
{
"driver": "LUT4",
"fanout": 673,
"net": "cache/g_cache.cache/g_banks[1].bank/mem_req_queue/pending_size/g_depth_n.g_out_reg.bypass"
"driver": "LUT3",
"fanout": 1036,
"net": "cache/g_cache.cache/g_mem_rsp_queue[0].mem_rsp_queue/g_ebN.fifo_queue/pending_size/g_size_gt1.g_single_step.g_size_gt2.empty_r_reg_1[0]"
},
{
"driver": "LUT4",
"fanout": 671,
"net": "cache/g_cache.cache/g_banks[3].bank/mem_req_queue/pending_size/g_depth_n.g_out_reg.bypass"
"driver": "LUT5",
"fanout": 1034,
"net": "cache/g_cache.cache/mem_rsp_xbar/g_omega.g_switches[0].g_stages[0].xbar_switch/g_multi_inputs.g_multiple_outputs.g_xbar_arbs[0].xbar_arb/g_input_select.g_arbiter.g_out_buf[0].out_buf/g_eb2.stream_buffer/E[0]"
},
{
"driver": "LUT2",
"fanout": 608,
"net": "cache/g_cache.cache/mem_req_xbar/g_omega.g_switches[0].g_stages[1].xbar_switch/g_multi_inputs.g_multiple_outputs.g_xbar_arbs[0].xbar_arb/g_input_select.g_arbiter.g_out_buf[0].out_buf/g_eb2.stream_buffer/g_buffer.flow_out"
"driver": "LUT5",
"fanout": 1034,
"net": "cache/g_cache.cache/mem_rsp_xbar/g_omega.g_switches[0].g_stages[0].xbar_switch/g_multi_inputs.g_multiple_outputs.g_xbar_arbs[0].xbar_arb/g_input_select.g_arbiter.g_out_buf[0].out_buf/g_eb2.stream_buffer/g_buffer.g_no_out_reg.data_out_r_reg[518]_0[0]"
},
{
"driver": "LUT3",
"fanout": 607,
"net": "cache/g_cache.cache/g_banks[3].bank/mem_req_queue/pending_size/E[0]"
"driver": "LUT5",
"fanout": 1034,
"net": "cache/g_cache.cache/mem_rsp_xbar/g_omega.g_switches[0].g_stages[0].xbar_switch/g_multi_inputs.g_multiple_outputs.g_xbar_arbs[1].xbar_arb/g_input_select.g_arbiter.g_out_buf[0].out_buf/g_eb2.stream_buffer/g_buffer.g_no_out_reg.data_out_r_reg[518]_0[0]"
},
{
"driver": "LUT3",
"fanout": 607,
"net": "cache/g_cache.cache/mem_req_xbar/g_omega.g_switches[1].g_stages[0].xbar_switch/g_multi_inputs.g_multiple_outputs.g_xbar_arbs[0].xbar_arb/g_input_select.g_arbiter.g_out_buf[0].out_buf/g_eb2.stream_buffer/g_buffer.flow_out"
"driver": "LUT5",
"fanout": 1034,
"net": "cache/g_cache.cache/mem_rsp_xbar/g_omega.g_switches[0].g_stages[0].xbar_switch/g_multi_inputs.g_multiple_outputs.g_xbar_arbs[1].xbar_arb/g_input_select.g_arbiter.g_out_buf[0].out_buf/g_eb2.stream_buffer/g_buffer.g_no_out_reg.data_out_r_reg[518]_1[0]"
},
{
"driver": "LUT3",
"fanout": 606,
"net": "cache/g_cache.cache/g_banks[0].bank/mem_req_queue/pending_size/g_size_gt1.g_single_step.g_size_gt2.empty_r_reg_1"
"driver": "PORT",
"fanout": 944,
"net": "reset"
},
{
"driver": "LUT3",
"fanout": 606,
"net": "cache/g_cache.cache/g_banks[2].bank/mem_req_queue/pending_size/g_size_gt1.g_single_step.g_size_gt2.empty_r_reg_4"
"driver": "LUT6",
"fanout": 636,
"net": "cache/g_cache.cache/g_banks[0].bank/reg_s1/mreq_queue_push"
},
{
"driver": "LUT3",
"fanout": 606,
"net": "cache/g_cache.cache/g_banks[3].bank/mem_req_queue/pending_size/g_size_gt1.g_single_step.g_size_gt2.empty_r_reg_4"
"driver": "LUT6",
"fanout": 636,
"net": "cache/g_cache.cache/g_banks[1].bank/reg_s1/mreq_queue_push"
},
{
"driver": "FDRE",
"fanout": 606,
"net": "g_depth_n.g_out_reg.data_out_r_reg[619]_i_3__0_n_0"
"driver": "LUT6",
"fanout": 636,
"net": "cache/g_cache.cache/g_banks[2].bank/reg_s1/mreq_queue_push"
}
],
"lut": 30113,
"lutram": 120,
"lut": 28369,
"lutram": 2258,
"uram": 0,
"wns_ns": -0.109
"wns_ns": 0.02
}
},
"core": {
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