Fix operand types in aarch64 inline asm#8
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guillerodriguez merged 1 commit intomasterfrom Feb 9, 2026
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In some cases, aarch64 inline asm operands used 32-bit types where 64-bit registers were required. While both clang and GCC generate correct code regardless, the operand types should match the register sizes for correctness and to silence clang -Wasm-operand-widths warnings. - COMPARE_AND_SWAP_64: change read_val from int to uintptr_t, cast old_val/new_val to uintptr_t (64-bit registers) - LOCKWORD_WRITE: cast value to uintptr_t (64-bit register) - initialisePlatform (linux/aarch64): change cache_type from unsigned int to unsigned long, as mrs always writes a 64-bit register Signed-off-by: Guillermo Rodríguez <grodriguez@ingelabs.com>
avazquezdev
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Feb 9, 2026
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In some cases, aarch64 inline asm operands used 32-bit types where 64-bit registers were required. While both clang and GCC generate correct code regardless, the operand types should match the register sizes for correctness and to silence clang -Wasm-operand-widths warnings.