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Simulator Structure
This page describe the basic NEMU simulator structure, including the top level code, packet generators and sinks as well as basic components such as fifos, arbiters and optical switches.
The hierarchy chart and block diagram below show how the top level code blocks are connected. The top level module is net_emulation.sv which is designed to be used for both simulation and synthesis, controlled by commenting/uncommenting the parameter `SYNTHESIS in the config file (Note: synthesis is currently un-tested).
The top level code instantiates a copy of packet_source.sv for every port, described here, and a single instance of packet_sink.sv, described here. These top level modules and generic network functions (FIFOs, arbiters, shift registers etc) are contained in the top level of the NetEmulation file structure as shown in the file list diagram.
The network under test is defined in network.sv. Although all networks share the same top level ports, their internal structure is very different, so each broad class of networks is defined in a separate folder within NetEmulation. For example, in the file structure shown in the figure, the design of the simple optical network and mesh network are contained in their own folders. On the other hand, changes to parameters and relatively minor architectural changes within a network class should be controlled by parameters within the config file. In simulation, the network to compile and test is defined by the simulation script, net.do.