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tfr_isfpga2: GPU-generation sweep with FEDP2K (N=8) and fanout CI #1888: Commit c0f11b4 pushed by NikhilRout
47s feature_mx
feature_mx
47s
Merge branch 'master' of https://github.com/vortexgpgpu/vortex CI #1887: Commit b8c5a24 pushed by tinebp
7h 25m 0s master
master
7h 25m 0s
tfr_isfpga2: rzr4, rzr4_lns and RaZeR W3.3-A4.3 reruns at 32 threads CI #1886: Commit 45b1a6e pushed by NikhilRout
40s feature_mx
feature_mx
40s
tfr_isfpga: direct dsm gating-logic attribution per datatype group CI #1885: Commit f891c4b pushed by NikhilRout
2h 45m 58s feature_mx
feature_mx
2h 45m 58s
libs: declare issue_wr before its first use in VX_mem_from_axi CI #1884: Commit bcba2ac pushed by tinebp
7h 39m 12s master
master
7h 39m 12s
set wctl.is_cond_neg to 0 to avoid a x defined tmask in sfu in 4 stat… CI #1883: Pull request #421 opened by JulessD
6h 42m 11s JulessD:decode_x_op_args
JulessD:decode_x_op_args
6h 42m 11s
ci: make a synthesis-gate run diagnosable from its GitHub page CI #1882: Commit a4afb23 pushed by tinebp
6h 39m 1s master
master
6h 39m 1s
hardcode defs_div_sqrt_mvp pkg into gen_sources.sh for fpnew synthesis CI #1881: Pull request #420 opened by JulessD
8h 46m 51s JulessD:gen_sources_fpnew
JulessD:gen_sources_fpnew
8h 46m 51s
fixed fp4 tfr wmul CI #1880: Commit 6e69cb2 pushed by NikhilRout
34m 27s feature_mx
feature_mx
34m 27s
CI CI #1879: Scheduled
12h 2m 46s master
master
12h 2m 46s
hw: declare every identifier before its first use CI #1878: Commit 8311a72 pushed by tinebp
15h 42m 30s master
master
15h 42m 30s
vm: review pass -- accurate comments and one uniform L2 fan-in CI #1877: Commit e546db0 pushed by tinebp
12h 53m 13s master
master
12h 53m 13s
hw: declare every identifier before its first use CI #1876: Pull request #418 synchronize by Lfan-ke
10h 37m 56s Lfan-ke:fix/declare-before-use
Lfan-ke:fix/declare-before-use
10h 37m 56s
ci: pin the AXI store->fill ordering guarantee under response reordering CI #1875: Commit 40220a2 pushed by tinebp
16h 34m 23s master
master
16h 34m 23s
sim: fix TCU tile-buffer response matching past 65536 requests (#414) CI #1874: Commit 60a5fa5 pushed by tinebp
9h 16m 27s master
master
9h 16m 27s
sim: fix TCU tile-buffer response matching past 65536 requests CI #1873: Pull request #414 synchronize by tinebp
15s eyoon1131:fix/tcu-tbuf-tag-wrap
eyoon1131:fix/tcu-tbuf-tag-wrap
15s
Close the fpga_gate and asic_gate: core/vm timing, dxa drain, baselin… CI #1872: Commit 63c381a pushed by tinebp
3h 45m 41s master
master
3h 45m 41s
Close the fpga_gate and asic_gate: core/vm timing, dxa drain, baseline refresh CI #1871: Pull request #419 synchronize by tinebp
57s fix/verilator-prebuilt-parts
fix/verilator-prebuilt-parts
57s
ci: re-record the tensor synthesis baseline under its pinned strategy CI #1870: Commit 6510044 pushed by tinebp
53s fix/verilator-prebuilt-parts
fix/verilator-prebuilt-parts
53s
fp4 scale empty lane opts CI #1869: Commit e61a868 pushed by NikhilRout
3m 16s feature_mx
feature_mx
3m 16s
lnsf4 synth opts CI #1868: Commit d227490 pushed by NikhilRout
1h 21m 30s feature_mx
feature_mx
1h 21m 30s
lnsf4 synth opts CI #1867: Commit 88c2fab pushed by NikhilRout
2h 6m 3s feature_mx
feature_mx
2h 6m 3s
Close the fpga_gate and asic_gate: core/vm timing, dxa drain, baseline refresh CI #1866: Pull request #419 opened by tinebp
7h 33m 17s fix/verilator-prebuilt-parts
fix/verilator-prebuilt-parts
7h 33m 17s
ci: re-record the tensor synthesis baseline under its pinned strategy CI #1865: Commit feb8965 pushed by tinebp
8h 37m 13s fix/verilator-prebuilt-parts
fix/verilator-prebuilt-parts
8h 37m 13s
added lnsf4 CI #1864: Commit cfa3e08 pushed by NikhilRout
5h 25m 0s feature_mx
feature_mx
5h 25m 0s