Unified Verilog hierarchical reference resolver

[gitmodimo]

Adds a single elab-time two-pass resolver that handles all hierarchical access patterns uniformly:
downward, upward, cross-instance, $root-anchored, and through generate blocks.

Why this is one large change

Two earlier local attempts tackled hier-refs incrementally: a sem-time downward resolver for
parent.child.signal within the lexical scope, and an elab-time upward resolver for cross-instance
access after the full tree was built. Neither generalised well — the sem-time pass set I_REF to the
prefix head which conflicted with later elab-time rebinding; cloned instances shared resolver state
across clones; and reheat had to independently recompute aliases that elab had already derived. Fixing
one edge case kept breaking another because two resolvers with different lifetime assumptions were
sharing the same node slots.

Those attempts didn't pan out, so this branch starts fresh with a unified design: one resolver, one
pass over the full instance tree, one alias computation shared by elab and reheat. The scope is large
because hierarchical references touch every pipeline stage — parser, sem, elab, lowering, JIT, reheat,
and VPI. Splitting it would leave intermediate states where some access patterns silently produce wrong
results.

Pipeline changes

• Parser: p_hierarchical_path is now the single entry point for all dotted identifiers. Event triggers
  (->, ->>), disable, and hier-ref task/function calls all route through it.
• Sem: V_HIER_REF nodes pass through with deferred type checking. Lvalue checks accept them
  unconditionally — the elab resolver owns validation.
• Elab: Two-pass resolver. A best-effort pre-elab pass resolves downward refs to parameters (needed for
  constant expressions in reg widths and generate conditions). A post-elab pass walks the full instance
  tree and resolves everything else.
• Lowering: Single V_HIER_REF code path via vlog_hier_unit_alias(). Parameters are inlined as
  constants; runtime variables use link_package(alias) + link_var. Adds force/release lowering and
  V_CONCAT non-blocking assignment lvalue support.
• JIT: irgen_instance_entry stores PUTPRIV so link_package can find each clone's context for
  cross-instance access.
• MIR: mir_alias_unit maps per-clone aliases to shared units so multi-instance modules resolve
  correctly.
• Reheat: Mirrors the elab alias computation from persistent data — no reheat-specific logic.

Design disciplines (enforced by the implementation)

1. No per-decl-kind branches in resolver tail lookup
2. Single parser hier-path helper used everywhere
3. Kind-agnostic scope walk (new scope kinds adapt automatically)
4. Single canonical-name encoder (vlog_canonical_scope_name)
5. Lvalue checks cover future parent kinds

Also included

• ->> (nonblocking trigger) token and parser support
• Instance-array bracket parsing at the syntax level
• force/release statement lowering

Blocked spec tests

19 spec tests are committed but commented out in testlist.txt, each annotated with its specific
orthogonal blocker (e.g. V_FORK sem, defparam, program/endprogram). When each blocker lands,
uncommenting the test is the only change needed.