This repository provides a practical testbench setup to simulate I/Q (In-phase and Quadrature) signal handling between VHDL and MATLAB.
It includes:
- π VHDL: File-based I/Q signal reader and writer with generic configurability.
- π Matlab: Scripts to load and save I/Q data as complex arrays compatible with the VHDL format.
/VHDL
βββ file_reader.vhd -- Reads I/Q from text (I0, Q0, I1, Q1...)
βββ file_writer.vhd -- Writes I/Q to text (one value per line)
βββ tb_reader_writer.vhd -- Testbench connecting reader & writer
/Matlab
βββ read_complex_from_txt.m -- Load text file into complex array
βββ write_complex_to_txt.m -- Save complex array to text file
- Write I/Q data in MATLAB using
write_complex_to_txt.m - Read it in VHDL with
file_reader.vhd - Process it or loop it through your DUT
- Write back in VHDL using
file_writer.vhd - Read results in MATLAB using
read_complex_from_txt.m
- Generic
DATA_WIDTHand file paths in VHDL - Fully synthesizable VHDL (suitable for simulation)
- Interval-based reading (e.g., read every N clock cycles)
- MATLAB-compatible text format (I followed by Q line-by-line)
100
-50
200
-25
β Represents:
[100 - 50i, 200 - 25i] Questions, improvements, or contributions are welcome! This setup is ideal for DSP testbenches, RF simulations, or I/Q streaming verification.
Let me know if you want to add:
- License
- Screenshots (e.g., waveform or MATLAB plots)
- A badge for simulator/tool support
This version keeps it simple but highly useful for engineers and students alike π.
- Milad Mohammadi.B β VHDL and MATLAB design, simulation setup
- ChatGPT (OpenAI) β Assisted with code generation, explanation, and documentation