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fix(ppu): the field flag toggles every frame, not only when interlaced - #293

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fix/ppu-field-flag-doc
Aug 1, 2026
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doublegate merged 2 commits into
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fix/ppu-field-flag-doc

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A v1.29.0 prerequisite, found where the plan said it would be.

The finding

Ppu::field is $213F bit 7. The code toggles it unconditionally at frame end
(end_of_scanline), which is what the hardware does. Its doc comment said:

Interlace field (toggles each frame when interlace is on).

That describes neither. Only the flag's use is interlace-conditional — interlace consumes it in
render.rs to select the odd/even row — and $213F exposes it regardless.

Why it is not cosmetic

The v1.29.0 dot-model work (B2.02 short line / B2.03 long line) needs a gate that keys on the
field. Reading the comment rather than the code makes that gate look unreachable in progressive
mode, which would have sent the implementation down a wrong path. The plan flagged exactly this
("field toggles unconditionally at frame end, so the gate is reachable — but field's doc comment
says otherwise and is stale against the code"); this confirms it against the source and pins it.

Verification

New test the_field_flag_toggles_every_frame_even_in_progressive_mode asserts io.interlace is
false, ticks four frames, and requires $213F bit 7 to read [0x80, 0x00, 0x80, 0x00].

Injection-checked rather than assumed: replacing the toggle with if self.io.interlace { ... } —
the behaviour the old comment described — fails the test with a constant [0, 0, 0, 0]. So the test
pins the mechanism, not the wording.

docs/ppu.md gains the rule in the same change, per the chip-doc requirement.

Gates: cargo test -p rustysnes-ppu, clippy -D warnings, fmt --check, and the no_std
thumbv7em-none-eabihf build all clean (the test uses a fixed array, not Vec, since the crate is
no_std).

🤖 Generated with Claude Code

`Ppu::field` is `$213F` bit 7 and is toggled unconditionally at frame
end, but its doc comment claimed it toggles "when interlace is on".
Only the flag's use is interlace-conditional -- interlace consumes it
to select the odd/even row.

The stale reading is load-bearing rather than cosmetic: it makes the
short/long-scanline gate that keys on the field look unreachable in
progressive mode, which is exactly the v1.29.0 prerequisite for B2.02
and B2.03.

Correct the comment and docs/ppu.md, and pin the behaviour with a test
that ticks four progressive frames and requires bit 7 to alternate.
Injecting the gate the old doc described makes it fail with a constant
[0,0,0,0].

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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📒 Files selected for processing (4)
  • CHANGELOG.md
  • crates/rustysnes-ppu/src/lib.rs
  • docs/accuracysnes-plan.md
  • docs/ppu.md

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…ains

v1.29.0's plan doubted whether B2.02's short-line gate could be reached
at all, because `field` is one of its inputs and that field's doc
comment said it only toggles when interlace is on.

Settled against the source: the code toggles it unconditionally, which
is what $213F bit 7 does; the comment was stale. All four gate inputs
are live.

Record that, and that the model change itself is not started -- and
why: `dot_length` is a pure function of the dot and cannot express a
per-line variation, so the line context has to be threaded to it, and
the guard test lands before it is touched.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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Antigravity review (Gemini via Ultra)

This PR corrects doc comments and docs/ppu.md to document that $213F bit 7 toggles unconditionally every frame, while adding a test to pin the existing implementation behavior.

Blocking issues

None found.

Suggestions

  • CHANGELOG.md: Remove the unrelated "App Store §4.7 self-audit done (v1.30.0)" changelog entry to maintain a single logical change per PR/commit.
  • Commit message / PR title: The title uses fix(ppu), but no runtime logic was modified in rustysnes-ppu (only docs, comments, and tests). docs(ppu) or test(ppu) is more accurate.

Nitpicks

  • crates/rustysnes-ppu/src/lib.rs:1337: The test assumes field is initialized to false prior to the first frame completion. Explicitly checking p.read_reg(0x213F) & 0x80 == 0 before entering the loop would clarify why seen[0] expects 0x80.

Automated first-pass review by agy on a self-hosted runner -- not a human review.

@doublegate
doublegate merged commit d200e3a into main Aug 1, 2026
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@doublegate
doublegate deleted the fix/ppu-field-flag-doc branch August 1, 2026 00:21
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