GitHub - czl0706/HDLBits: Pratice sequential circuits modeing w/ Verilog · GitHub

Repository navigation

HDLBits

Public

About

Pratice sequential circuits modeing w/ Verilog

0 stars

1 watching

Report repository

Name		Name	Last commit message	Last commit date
Edgecapture.v		Edgecapture.v
Edgedetect.v		Edgedetect.v
Edgedetect2.v		Edgedetect2.v
Fsm1.v		Fsm1.v
Fsm1s.v		Fsm1s.v
Fsm2.v		Fsm2.v
Fsm2s.v		Fsm2s.v
Fsm3.v		Fsm3.v
Fsm3comb.v		Fsm3comb.v
Fsm3onehot.v		Fsm3onehot.v
Fsm3s.v		Fsm3s.v
Fsm_onehot.v		Fsm_onehot.v
Fsm_ps2.v		Fsm_ps2.v
Fsm_ps2data.v		Fsm_ps2data.v
Fsm_serial.v		Fsm_serial.v
Fsm_serialdata.v		Fsm_serialdata.v
Lemmings1.v		Lemmings1.v
Lemmings2.v		Lemmings2.v
Lemmings3.v		Lemmings3.v
Lemmings4.v		Lemmings4.v
Lfsr32.v		Lfsr32.v
Lfsr5.v		Lfsr5.v
Rotate100.v		Rotate100.v
Rule110.v		Rule110.v
Rule90.v		Rule90.v
Shift18.v		Shift18.v
Shift4.v		Shift4.v
ece241_2013_q4.v		ece241_2013_q4.v
review2015_count1k.v		review2015_count1k.v
review2015_fsm.v		review2015_fsm.v
review2015_fsmseq.v		review2015_fsmseq.v
review2015_fsmshift.v		review2015_fsmshift.v
review2015_shiftcount.v		review2015_shiftcount.v

About

Pratice sequential circuits modeing w/ Verilog

0 stars

1 watching

Report repository

Releases

Packages

Used by

Contributors

Languages