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9e6723a
add j dimension to find_N2 related arrs
edoyango May 30, 2026
98b80e2
set_diffusivity: block j loops in find_N2 and find_rho_bottom
edoyango May 31, 2026
6c4ed0c
set_diffusivity: block j loops in calculate_bkgnd_mixing and find_TKE…
edoyango May 31, 2026
ccbb5ac
set_diffusivity: block j loops in find_TKE_to_Kd and set_density_ratios
edoyango May 31, 2026
6071a19
set_diffusivity: consolidate thickness_to_dz into single dz array
edoyango May 31, 2026
d22f2ea
set_diffusivity: move ML_radiation, tidal_mixing, int_tides out of OM…
edoyango May 31, 2026
f93183b
set_diffusivity: block j loops in add_drag_diffusivity
edoyango May 31, 2026
9486a85
set_diffusivity: move remaining OMP j-loop blocks out into own j-loops
edoyango May 31, 2026
a2438fc
ijk arrays in find_n2
edoyango Jun 1, 2026
72c9ed1
kji arrays set_density_ratios
edoyango Jun 1, 2026
f679d39
more kji in find_tke_to_kd
edoyango Jun 1, 2026
7b155bc
MOM_cpu_clock_infra: emit NVTX ranges for MOM6 cpu clocks
JorgeG94 Jul 14, 2026
471e1ff
kappa_shear: offload h_at_u/h_at_v vertex interpolation to GPU
JorgeG94 Jul 17, 2026
304e3a0
MOM_EOS: add device-callable density-derivs dispatcher (declare target)
JorgeG94 Jul 17, 2026
b4a3110
kappa_shear: compute density derivs via device-callable EOS dispatche…
JorgeG94 Jul 17, 2026
0593e85
kappa_shear: hoist EOS form/scaling resolution to the drivers (offloa…
JorgeG94 Jul 17, 2026
a3976c9
kappa_shear: make the column solver device-callable (declare target)
JorgeG94 Jul 17, 2026
0473a5f
kappa_shear: offload the vertex slab interpolation to GPU (3-D slabs)
JorgeG94 Jul 17, 2026
114849b
kappa_shear: run the vertex column solver on the GPU
JorgeG94 Jul 17, 2026
9d97e79
kappa_shear: fixed-size column arrays in GPU builds (drop device-heap…
JorgeG94 Jul 17, 2026
79459a6
kappa_shear: review fixes - refresh device tke_io/kv_io, correct T/S …
JorgeG94 Jul 17, 2026
c0d2980
MOM_EOS: add device-callable in-situ-density dispatcher (declare target)
JorgeG94 Jul 18, 2026
d48ee86
int_density_dz_generic_plm: element-wise device-callable EOS path (of…
JorgeG94 Jul 18, 2026
f56c33f
int_density_dz_generic_plm: offload phase 1 (vertical integrals) to GPU
JorgeG94 Jul 18, 2026
88d34bc
int_density_dz_generic_plm: offload phases 2 & 3 (horizontal x/y inte…
JorgeG94 Jul 18, 2026
0d216aa
PressureForce_FV_Bouss: consume the PLM density integrals on-device (…
JorgeG94 Jul 19, 2026
c59bbb1
int_density_dz_generic_plm: leave integral outputs device-resident (i…
JorgeG94 Jul 19, 2026
5b5cc1d
kappa_shear: run the h-point column solver (Calculate_kappa_shear) on…
JorgeG94 Jul 19, 2026
4a26c7b
tracer_hor_diff: fixed-size epipycnal private arrays in GPU builds (f…
JorgeG94 Jul 19, 2026
812dad7
MOM_regridding/coord_zlike: extract device-callable _loc kernels for …
JorgeG94 Jul 19, 2026
06d3ef7
MOM_regridding/coord_zlike: run the ZSTAR regrid column loop on the GPU
JorgeG94 Jul 20, 2026
f40c048
Merge remote-tracking branch 'edoyango/port-set_diffusivity' into fea…
JorgeG94 Jul 20, 2026
b2706c2
set_diffusivity: run find_N2 on the GPU (benchmark_ALE active path)
JorgeG94 Jul 20, 2026
b8bc685
ePBL: make the column-solver helpers + Langmuir kernels device-callab…
JorgeG94 Jul 20, 2026
1f9063b
ePBL: make ePBL_column device-callable with fixed-size scratch (incre…
JorgeG94 Jul 20, 2026
fe44661
ePBL: offload the energetic_PBL driver loop to GPU (increment 3)
JorgeG94 Jul 20, 2026
393b825
thickness_diffuse: route density derivatives through the device EOS d…
JorgeG94 Jul 20, 2026
77eb442
thickness_diffuse: promote slope scratch to 3-D (increment 2a, offloa…
JorgeG94 Jul 20, 2026
e10ee72
thickness_diffuse: offload thickness_diffuse_full to GPU (increment 2b)
JorgeG94 Jul 20, 2026
726842d
ePBL: document the device-vs-host transcendental bitwise-repro sites …
JorgeG94 Jul 20, 2026
2e9062d
wave_interface: flag the LF17 Langmuir on-device transcendental sites…
JorgeG94 Jul 20, 2026
3c1ed41
MOM_intrinsic_functions: add exp_reprod, a bit-reproducible device-ca…
JorgeG94 Jul 20, 2026
edd2468
MOM_intrinsic_functions: add log_reprod, a bit-reproducible device-ca…
JorgeG94 Jul 20, 2026
95a0569
MOM_intrinsic_functions: add erfc_reprod, a bit-reproducible device-c…
JorgeG94 Jul 20, 2026
87a6061
ePBL/wave: route on-device transcendentals through reproducible kerne…
JorgeG94 Jul 20, 2026
dbe221e
ePBL/wave: mark the gpu-bitwise-repro audits RESOLVED (wired to repro…
JorgeG94 Jul 20, 2026
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34 changes: 34 additions & 0 deletions config_src/infra/FMS1/MOM_cpu_clock_infra.F90
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,12 @@
!> Wraps the MPP cpu clock functions
!!
!! The functions and constants should be accessed via mom_cpu_clock
!!
!! Compiling with -DMOM_USE_NVTX additionally emits an NVTX range around every MOM6 cpu
!! clock, so each existing cpu_clock_id() name becomes a named range in an nsys timeline
!! with no call-site changes. It requires nvfortran and the NVTX library
!! (-DMOM_USE_NVTX ... -cudalib=nvtx). Undefined by default: a normal build compiles
!! exactly as before and links no extra library.
module MOM_cpu_clock_infra

! These interfaces and constants from MPP/FMS will not be directly exposed outside of this module
Expand All @@ -18,9 +24,22 @@ module MOM_cpu_clock_infra
use mpp_mod, only : MPP_CLOCK_ROUTINE => CLOCK_ROUTINE
use mpp_mod, only : MPP_CLOCK_LOOP => CLOCK_LOOP
use mpp_mod, only : MPP_CLOCK_INFRA => CLOCK_INFRA
#ifdef MOM_USE_NVTX
use nvtx, only : nvtxStartRange, nvtxEndRange
#endif

implicit none ; private

#ifdef MOM_USE_NVTX
!> The largest clock handle for which an NVTX range name is retained.
integer, parameter :: MAX_NVTX_CLOCKS = 4096
!> The NVTX range name for each clock handle, recorded by cpu_clock_id(). An empty entry
!! means no range is emitted for that handle. cpu_clock_begin() and cpu_clock_end() test
!! the same condition, so starts and ends stay balanced for handles that were never named
!! or that fall outside the table.
character(len=64), dimension(MAX_NVTX_CLOCKS) :: nvtx_clock_names = ""
#endif

! Public entities
public :: cpu_clock_id, cpu_clock_begin, cpu_clock_end
public :: CLOCK_COMPONENT, CLOCK_SUBCOMPONENT, CLOCK_MODULE_DRIVER, CLOCK_MODULE
Expand Down Expand Up @@ -60,6 +79,12 @@ module MOM_cpu_clock_infra
subroutine cpu_clock_begin(id)
integer, intent(in) :: id !< Handle for clock

#ifdef MOM_USE_NVTX
! Opened before, and closed after, the mpp clock so the NVTX range encloses it.
if (id > 0 .and. id <= MAX_NVTX_CLOCKS) then
if (len_trim(nvtx_clock_names(id)) > 0) call nvtxStartRange(trim(nvtx_clock_names(id)))
endif
#endif
call mpp_clock_begin(id)

end subroutine cpu_clock_begin
Expand All @@ -69,6 +94,11 @@ subroutine cpu_clock_end(id)
integer, intent(in) :: id !< Handle for clock

call mpp_clock_end(id)
#ifdef MOM_USE_NVTX
if (id > 0 .and. id <= MAX_NVTX_CLOCKS) then
if (len_trim(nvtx_clock_names(id)) > 0) call nvtxEndRange
endif
#endif

end subroutine cpu_clock_end

Expand Down Expand Up @@ -96,6 +126,10 @@ integer function cpu_clock_id(name, sync, grain)
endif

cpu_clock_id = mpp_clock_id(name, flags=clock_flags, grain=grain)
#ifdef MOM_USE_NVTX
if (cpu_clock_id > 0 .and. cpu_clock_id <= MAX_NVTX_CLOCKS) &
nvtx_clock_names(cpu_clock_id) = name
#endif
end function cpu_clock_id

end module MOM_cpu_clock_infra
34 changes: 34 additions & 0 deletions config_src/infra/FMS2/MOM_cpu_clock_infra.F90
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,12 @@
!> Wraps the MPP cpu clock functions
!!
!! The functions and constants should be accessed via mom_cpu_clock
!!
!! Compiling with -DMOM_USE_NVTX additionally emits an NVTX range around every MOM6 cpu
!! clock, so each existing cpu_clock_id() name becomes a named range in an nsys timeline
!! with no call-site changes. It requires nvfortran and the NVTX library
!! (-DMOM_USE_NVTX ... -cudalib=nvtx). Undefined by default: a normal build compiles
!! exactly as before and links no extra library.
module MOM_cpu_clock_infra

! These interfaces and constants from MPP/FMS will not be directly exposed outside of this module
Expand All @@ -18,9 +24,22 @@ module MOM_cpu_clock_infra
use mpp_mod, only : MPP_CLOCK_ROUTINE => CLOCK_ROUTINE
use mpp_mod, only : MPP_CLOCK_LOOP => CLOCK_LOOP
use mpp_mod, only : MPP_CLOCK_INFRA => CLOCK_INFRA
#ifdef MOM_USE_NVTX
use nvtx, only : nvtxStartRange, nvtxEndRange
#endif

implicit none ; private

#ifdef MOM_USE_NVTX
!> The largest clock handle for which an NVTX range name is retained.
integer, parameter :: MAX_NVTX_CLOCKS = 4096
!> The NVTX range name for each clock handle, recorded by cpu_clock_id(). An empty entry
!! means no range is emitted for that handle. cpu_clock_begin() and cpu_clock_end() test
!! the same condition, so starts and ends stay balanced for handles that were never named
!! or that fall outside the table.
character(len=64), dimension(MAX_NVTX_CLOCKS) :: nvtx_clock_names = ""
#endif

! Public entities
public :: cpu_clock_id, cpu_clock_begin, cpu_clock_end
public :: CLOCK_COMPONENT, CLOCK_SUBCOMPONENT, CLOCK_MODULE_DRIVER, CLOCK_MODULE
Expand Down Expand Up @@ -60,6 +79,12 @@ module MOM_cpu_clock_infra
subroutine cpu_clock_begin(id)
integer, intent(in) :: id !< Handle for clock

#ifdef MOM_USE_NVTX
! Opened before, and closed after, the mpp clock so the NVTX range encloses it.
if (id > 0 .and. id <= MAX_NVTX_CLOCKS) then
if (len_trim(nvtx_clock_names(id)) > 0) call nvtxStartRange(trim(nvtx_clock_names(id)))
endif
#endif
call mpp_clock_begin(id)

end subroutine cpu_clock_begin
Expand All @@ -69,6 +94,11 @@ subroutine cpu_clock_end(id)
integer, intent(in) :: id !< Handle for clock

call mpp_clock_end(id)
#ifdef MOM_USE_NVTX
if (id > 0 .and. id <= MAX_NVTX_CLOCKS) then
if (len_trim(nvtx_clock_names(id)) > 0) call nvtxEndRange
endif
#endif

end subroutine cpu_clock_end

Expand Down Expand Up @@ -96,6 +126,10 @@ integer function cpu_clock_id(name, sync, grain)
endif

cpu_clock_id = mpp_clock_id(name, flags=clock_flags, grain=grain)
#ifdef MOM_USE_NVTX
if (cpu_clock_id > 0 .and. cpu_clock_id <= MAX_NVTX_CLOCKS) &
nvtx_clock_names(cpu_clock_id) = name
#endif
end function cpu_clock_id

end module MOM_cpu_clock_infra
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