GitHub - LINKD123/PMSM_DESIGN · GitHub

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
anti_patk_sim/new		anti_patk_sim/new
can_bus_app_sim/new		can_bus_app_sim/new
can_data_link_sim		can_data_link_sim
constrs_1/new		constrs_1/new
electrical_rotation_phase_trig_caculation_sim/new		electrical_rotation_phase_trig_caculation_sim/new
gate_driver_sim/new		gate_driver_sim/new
location_control_simn/new		location_control_simn/new
pid_sim/new		pid_sim/new
sim_1/new		sim_1/new
sim_2/new		sim_2/new
sources_1		sources_1
speed_detection_sim/new		speed_detection_sim/new
svpwm_gen_sim/new		svpwm_gen_sim/new
system_control_sim/new		system_control_sim/new
uart_sim/new		uart_sim/new

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VHDL 97.6%
Verilog 2.2%
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