i#3544: Save vector registers with LMUL=1 for any VLEN <= 256

[wangzhemaxa]

The vector register save/restore paths (append_save_simd_reg, append_restore_simd_reg, insert_push_all_registers, and insert_pop_all_registers) copied eight registers at a time with LMUL=8. An LMUL=8 group store packs the eight registers contiguously, so register N's bytes land at &simd[N] only when VLEN is exactly 256 bits and fills a whole dr_simd_t slot. On any other VLEN the mcontext layout contract VREG_OFFSET(reg) == &simd[reg - VR0] is broken.

Copy one register at a time with LMUL=1 instead, so each register's vlenb bytes always land in the low bytes of its own dr_simd_t slot for any supported VLEN <= 256 bits.

Issue: #3544

[edeiana]

Thank you for contributing!

It would be great if you could add a test for this issue, but I realize it's not straightforward; you'd have to write an application using the vector registers and a client that would insert, for example, a clean call, which would then trigger the saving of the mcontext.
So, approving regardless, as this is an improvement compared to what we have now.