adding raycast benchmark

Author: tinebp

sim/simx/core.cpp

@@ -358,6 +358,64 @@ void Core::issue() {
       }
     }
 
+    if (ready_set.any()) {
+      // apply user-driven scheduling
+      auto count = ready_set.count();
+      if (count > 1) {
+        uint32_t priority_warps = 0;
+        uint32_t yielding_warps = 0;
+        for (uint32_t j = 0; j < PER_ISSUE_WARPS; ++j) {
+          if (ready_set.test(j)) {
+            uint32_t wid = j * ISSUE_WIDTH + iw;
+            auto& warp = emulator_.warps_.at(wid);
+            if (warp.priority > 0) {
+              ++priority_warps;
+            }
+            if (warp.yield > 0) {
+              ++yielding_warps;
+            }
+            if (warp.priority > 0 && warp.yield > 0) {
+              std::cout << "Warp cannot be both priority and yielding! wid=" << wid << std::endl << std::flush;
+              std::abort();
+            }
+          }
+        }
+        if (yielding_warps != 0) {
+          // remove yielding warps from ready set
+          for (uint32_t j = 0; j < PER_ISSUE_WARPS; ++j) {
+            if (ready_set.test(j)) {
+              uint32_t wid = j * ISSUE_WIDTH + iw;
+              auto& warp = emulator_.warps_.at(wid);
+              if (warp.yield > 0) {
+                ready_set.reset(j);
+                --warp.yield; // update yield counter
+                --count;
+                auto& ibuffer = ibuffers_.at(wid);
+                auto trace = ibuffer.top();
+                DT(3, "*** pipeline-counter-yield: " << *trace);
+              }
+            }
+          }
+        }
+        if (priority_warps != 0 && priority_warps < count) {
+          // remove non-priority warps from ready set
+          for (uint32_t j = 0; j < PER_ISSUE_WARPS; ++j) {
+            if (ready_set.test(j)) {
+              uint32_t wid = j * ISSUE_WIDTH + iw;
+              auto& warp = emulator_.warps_.at(wid);
+              if (warp.priority == 0) {
+                ready_set.reset(j);
+                --count;
+                auto& ibuffer = ibuffers_.at(wid);
+                auto trace = ibuffer.top();
+                DT(3, "*** pipeline-priority-yield: " << *trace);
+              }
+            }
+          }
+        }
+      }
+    }
+    
     if (ready_set.any()) {
       // select one instruction from ready set
       auto w = ibuffer_arbs_.at(iw).grant(ready_set);

sim/simx/decode.cpp

@@ -368,6 +368,7 @@ static op_string_t op_string(const Instr &instr) {
       case WctlType::JOIN:   return {"JOIN", ""};
       case WctlType::BAR:    return {"BAR", ""};
       case WctlType::PRED:   return {wctlArgs.is_neg ? "PRED.N":"PRED", ""};
+      case WctlType::WSCHED: return {"WSCHED", "priority=" + std::to_string(wctlArgs.priority) + ", yield=" + std::to_string(wctlArgs.yield)};
       default:
         std::abort();
       }
@@ -1032,16 +1033,22 @@ void Emulator::decode(uint32_t code, uint32_t wid, uint64_t uuid) {
         instr->setSrcReg(1, rs2, RegType::Integer);
         wctlArgs.is_neg = (rd != 0);
         break;
+      case 6: // WSCHED
+        instr->setOpType(WctlType::WSCHED);
+        wctlArgs.priority = rs1;
+        wctlArgs.yield = rs2;
+        break;
       default:
         std::abort();
       }
       instr->setArgs(wctlArgs);
       ibuffer.push_back(instr);
     } break;
-    case 1: { // VOTE
+    case 1: { // VOTE & SHUFFLE
       auto instr = std::allocate_shared<Instr>(instr_pool_, uuid, FUType::ALU);
       instr->setDestReg(rd, RegType::Integer);
       instr->setSrcReg(0, rs1, RegType::Integer);
+      instr->setSrcReg(1, rs2, RegType::Integer);
       switch (funct3) {
       case 0:
         instr->setOpType(VoteType::ALL);
@@ -1057,19 +1064,19 @@ void Emulator::decode(uint32_t code, uint32_t wid, uint64_t uuid) {
         break;
       case 4:
         instr->setOpType(ShflType::UP);
-        instr->setSrcReg(1, rs2, RegType::Integer);
+        instr->setSrcReg(2, rs3, RegType::Integer);
         break;
       case 5:
         instr->setOpType(ShflType::DOWN);
-        instr->setSrcReg(1, rs2, RegType::Integer);
+        instr->setSrcReg(2, rs3, RegType::Integer);
         break;
       case 6:
         instr->setOpType(ShflType::BFLY);
-        instr->setSrcReg(1, rs2, RegType::Integer);
+        instr->setSrcReg(2, rs3, RegType::Integer);
         break;
       case 7:
         instr->setOpType(ShflType::IDX);
-        instr->setSrcReg(1, rs2, RegType::Integer);
+        instr->setSrcReg(2, rs3, RegType::Integer);
         break;
       default:
         std::abort();

sim/simx/emulator.cpp

@@ -36,13 +36,17 @@ warp_t::warp_t(uint32_t num_threads)
   , tmask(num_threads)
   , PC(0)
   , uuid(0)
+  , priority(0)
+  , yield(0)
 {}
 
 void warp_t::reset(uint64_t startup_addr) {
   this->tmask.reset();
   this->PC = startup_addr;
   this->uuid = 0;
   this->fcsr = 0;
+  this->priority = 0;
+  this->yield = 0;
 
   for (auto& reg_file : this->ireg_file) {
     for (auto& reg : reg_file) {

sim/simx/emulator.h

@@ -60,6 +60,8 @@ struct warp_t {
   Word                              PC;
   Byte                              fcsr;
   uint32_t                          uuid;
+  uint32_t                          priority;
+  uint32_t                          yield;
 
   warp_t(uint32_t num_threads);
 
@@ -164,6 +166,8 @@ class Emulator {
 #endif
 
   PoolAllocator<Instr, 64> instr_pool_;
+
+  friend class Core;
 };
 
 }

sim/simx/execute.cpp

@@ -145,6 +145,8 @@ instr_trace_t* Emulator::execute(const Instr &instr, uint32_t wid) {
   DP(1, "Instr: " << instr << ", cid=" << core_->id() << ", wid=" << wid << ", tmask=" << warp.tmask
          << ", PC=0x" << std::hex << warp.PC << std::dec << " (#" << instr.getUUID() << ")");
 
+  assert(warp.tmask.any());
+
   // fetch register values
   if (rsrc0.type != RegType::None) fetch_registers(rs1_data, wid, 0, rsrc0);
   if (rsrc1.type != RegType::None) fetch_registers(rs2_data, wid, 1, rsrc1);
@@ -313,15 +315,16 @@ instr_trace_t* Emulator::execute(const Instr &instr, uint32_t wid) {
       for (uint32_t t = thread_start; t < num_threads; ++t) {
         if (!warp.tmask.test(t))
           continue;
-        auto is_pred = rs1_data[t].i & 0x1;
+        bool is_pred = (rs1_data[t].i & 1) != 0;
+        has_vote_true  |= is_pred;
+        has_vote_false |= !is_pred;
         if (is_pred) {
-          has_vote_true = true;
           ballot |= (Word(1) << t);
-        } else {
-          has_vote_false = true;
         }
       }
       for (uint32_t t = thread_start; t < num_threads; ++t) {
+        if (!warp.tmask.test(t))
+          continue;
         switch (vote_type) {
         case VoteType::ALL:
           rd_data[t].i = !has_vote_false;
@@ -373,8 +376,9 @@ instr_trace_t* Emulator::execute(const Instr &instr, uint32_t wid) {
         default:
           std::abort();
         }
-        if (!pval)
+        if (!pval) {
           lane = t;
+        }
         if (lane < num_threads) {
           rd_data[t].i = rs1_data[lane].i;
         } else {
@@ -1396,6 +1400,11 @@ instr_trace_t* Emulator::execute(const Instr &instr, uint32_t wid) {
           next_tmask = ThreadMask(num_threads, rs2_data.at(thread_last).u);
         }
       } break;
+      case WctlType::WSCHED: {
+        trace->fetch_stall = true;
+        warp.priority = wctlArgs.priority;
+        warp.yield = wctlArgs.yield;
+      } break;
       default:
         std::abort();
       }

sim/simx/func_unit.cpp

@@ -368,6 +368,7 @@ void SfuUnit::tick() {
 			case WctlType::SPLIT:
 			case WctlType::JOIN:
 			case WctlType::PRED:
+		  case WctlType::WSCHED:
 				output.push(trace, 2+delay);
 				break;
 			case WctlType::BAR: {

sim/simx/types.h

@@ -429,11 +429,14 @@ enum class WctlType {
   SPLIT,
   JOIN,
   BAR,
-  PRED
+  PRED,
+  WSCHED
 };
 
 struct IntrWctlArgs {
-  uint32_t is_neg : 1;
+  uint32_t is_neg   : 1;
+  uint32_t priority : 1;
+  uint32_t yield    : 5;
 };
 
 inline std::ostream &operator<<(std::ostream &os, const WctlType& type) {
@@ -444,6 +447,7 @@ inline std::ostream &operator<<(std::ostream &os, const WctlType& type) {
   case WctlType::JOIN:   os << "JOIN"; break;
   case WctlType::BAR:    os << "BAR"; break;
   case WctlType::PRED:   os << "PRED"; break;
+  case WctlType::WSCHED: os << "WSCHED"; break;
   default:
     assert(false);
   }

tests/regression/Makefile

@@ -22,6 +22,7 @@ all:
 	$(MAKE) -C sgemm2
 	$(MAKE) -C madmax
 	$(MAKE) -C stencil3d
+	$(MAKE) -C raycast
 
 run-simx:
 	$(MAKE) -C basic run-simx
@@ -44,6 +45,7 @@ run-simx:
 	$(MAKE) -C sgemm2 run-simx
 	$(MAKE) -C madmax run-simx
 	$(MAKE) -C stencil3d run-simx
+	$(MAKE) -C raycast run-simx
 
 run-rtlsim:
 	$(MAKE) -C basic run-rtlsim
@@ -66,6 +68,7 @@ run-rtlsim:
 	$(MAKE) -C sgemm2 run-rtlsim
 	$(MAKE) -C madmax run-rtlsim
 	$(MAKE) -C stencil3d run-rtlsim
+	$(MAKE) -C raycast run-rtlsim
 
 clean:
 	$(MAKE) -C basic clean
@@ -88,3 +91,4 @@ clean:
 	$(MAKE) -C sgemm2 clean
 	$(MAKE) -C madmax clean
 	$(MAKE) -C stencil3d clean
+	$(MAKE) -C raycast clean

tests/regression/priority/Makefile

@@ -0,0 +1,14 @@
+ROOT_DIR := $(realpath ../../..)
+include $(ROOT_DIR)/config.mk
+
+PROJECT := priority
+
+SRC_DIR := $(VORTEX_HOME)/tests/regression/$(PROJECT)
+
+SRCS := $(SRC_DIR)/main.cpp
+
+VX_SRCS := $(SRC_DIR)/kernel.cpp
+
+OPTS ?= -n32
+
+include ../common.mk

tests/regression/priority/common.h

@@ -0,0 +1,16 @@
+#ifndef _COMMON_H_
+#define _COMMON_H_
+
+#ifndef TYPE
+#define TYPE float
+#endif
+
+typedef struct {
+  uint32_t grid_dim[2];
+  uint32_t size;
+  uint64_t A_addr;
+  uint64_t B_addr;
+  uint64_t C_addr;
+} kernel_arg_t;
+
+#endif