Per validation.md → Findings → F11. The KiCad library footprints for the panel-facing connectors on this PCB do not expose their panel-side mounting / cutout geometry on any plottable layer.
Affected connectors:
- Neutrik NCJ6FA-H combo jack ×4 — panel-side M3 mounting holes are diagonally placed, outside the Ø24 mm bezel cutout. Pattern is only available in the bundled
.step mesh model (not parametric).
- CUI SDS-50J MIDI DIN ×3 — panel-side retention features absent from F.Fab / silkscreen.
- Hirose DM3BT microSD ×1 — back-mounted on B.Cu; card-aperture position on the panel face is not marked.
- DC barrel jack ×1 — body-clearance outline not flagged on any panel-facing layer.
- JST VH 2-pin ×1 — same.
Consequences
No electrical impact. Purely a mechanical / fabrication cost: every time a panel, faceplate, or hand-cut enclosure is built against this PCB, the designer has to re-derive each cutout from manufacturer datasheets. During the May 2026 aluminium back-panel attempt this loop produced two wrong template iterations (vertical centreline screws, then horizontal centreline) before landing on the correct diagonal-outside pattern by inspection.
Rev 2c fix
Add a panel-overlay drawing on Dwgs.User (or introduce a dedicated Panel.Cutout user layer) for every panel-facing connector. For each connector mark:
- Front-face cutout outline at true size (round / D-shape / slot / body envelope).
- Panel mounting hole centres with drill diameter callout.
- A reference cross at the connector axis intersected by the panel plane.
Once present the full back-panel drilling pattern can be exported 1:1 with
kicad-cli pcb export svg --layers Dwgs.User,Edge.Cuts daisy-studio.kicad_pcb
and used directly as a paper drilling template — no per-connector datasheet archaeology, no hand-coded script.
Rev 2b mitigation in place: scripts/back_panel_template.py hard-codes the connector cutout patterns from datasheet values; verify by holding a printed template against an actual connector before drilling metal. This script becomes redundant once the overlay layer lands.
Per
validation.md→ Findings → F11. The KiCad library footprints for the panel-facing connectors on this PCB do not expose their panel-side mounting / cutout geometry on any plottable layer.Affected connectors:
.stepmesh model (not parametric).Consequences
No electrical impact. Purely a mechanical / fabrication cost: every time a panel, faceplate, or hand-cut enclosure is built against this PCB, the designer has to re-derive each cutout from manufacturer datasheets. During the May 2026 aluminium back-panel attempt this loop produced two wrong template iterations (vertical centreline screws, then horizontal centreline) before landing on the correct diagonal-outside pattern by inspection.
Rev 2c fix
Add a panel-overlay drawing on
Dwgs.User(or introduce a dedicatedPanel.Cutoutuser layer) for every panel-facing connector. For each connector mark:Once present the full back-panel drilling pattern can be exported 1:1 with
and used directly as a paper drilling template — no per-connector datasheet archaeology, no hand-coded script.
Rev 2b mitigation in place:
scripts/back_panel_template.pyhard-codes the connector cutout patterns from datasheet values; verify by holding a printed template against an actual connector before drilling metal. This script becomes redundant once the overlay layer lands.