diff --git a/qemu-components/common/include/libqemu-cxx/target_info.h b/qemu-components/common/include/libqemu-cxx/target_info.h index 7d81b0e9..cd63b4e9 100644 --- a/qemu-components/common/include/libqemu-cxx/target_info.h +++ b/qemu-components/common/include/libqemu-cxx/target_info.h @@ -12,6 +12,7 @@ namespace qemu { enum Target { AARCH64, + ARM, RISCV64, RISCV32, MICROBLAZE, diff --git a/qemu-components/common/include/qemu-instance.h b/qemu-components/common/include/qemu-instance.h index ed006a27..14b160d5 100644 --- a/qemu-components/common/include/qemu-instance.h +++ b/qemu-components/common/include/qemu-instance.h @@ -292,6 +292,8 @@ class QemuInstance : public sc_core::sc_module { if (s == "AARCH64") { return QemuInstance::Target::AARCH64; + } else if (s == "ARM") { + return QemuInstance::Target::ARM; } else if (s == "RISCV64") { return QemuInstance::Target::RISCV64; } else if (s == "RISCV32") { diff --git a/qemu-components/common/src/libqemu-cxx/target-info.cc b/qemu-components/common/src/libqemu-cxx/target-info.cc index 85cda0c2..f4a43082 100644 --- a/qemu-components/common/src/libqemu-cxx/target-info.cc +++ b/qemu-components/common/src/libqemu-cxx/target-info.cc @@ -16,6 +16,9 @@ const char* get_target_name(Target t) case AARCH64: return "AArch64"; + case ARM: + return "ARM (32-bit)"; + case RISCV64: return "RISC-V (64 bits)"; @@ -40,6 +43,10 @@ const char* get_target_name(Target t) #define LIBQEMU_TARGET_aarch64_LIBRARY nullptr #endif +#ifndef LIBQEMU_TARGET_arm_LIBRARY +#define LIBQEMU_TARGET_arm_LIBRARY nullptr +#endif + #ifndef LIBQEMU_TARGET_riscv64_LIBRARY #define LIBQEMU_TARGET_riscv64_LIBRARY nullptr #endif @@ -66,6 +73,9 @@ const char* get_target_lib(Target t) case AARCH64: return LIBQEMU_TARGET_aarch64_LIBRARY; + case ARM: + return LIBQEMU_TARGET_arm_LIBRARY; + case RISCV64: return LIBQEMU_TARGET_riscv64_LIBRARY;