@@ -15,9 +15,40 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ## [Unreleased]
 
-*Nothing yet — the next planned milestone is **v2.0.1** (the first release of the
-Android mobile-finalization re-port train onto the v2.0.0 core; see
-`to-dos/ROADMAP.md`).*
+### Removed
+
+- **Dead `mc-r1-dmc-abort-probe` diagnostic feature (v2.0.1 housekeeping).** The
+  default-off DMC-DMA-abort scheduling probe left over from the v2.0.0 Timebase
+  R-1 work is removed in full: the `[features]` declarations in `rustynes-apu`,
+  `rustynes-core`, and `rustynes-test-harness`; the gated `abort_probe` pub-static
+  atomic-counter module and its `lib.rs` re-export; every `#[cfg(feature =
+  "mc-r1-dmc-abort-probe")]` increment/dump site in `rustynes-apu/src/apu.rs` and
+  `rustynes-core/src/bus.rs`; and the probe-only reporting block in the
+  `scan_dma_abort` diagnostic bin (the bin itself is retained — its no-features
+  RAM-scan fast-path has standalone value). The flag gated **only** diagnostic
+  counters and CSV dumps, never shipped behaviour, so the default build is
+  byte-identical — **AccuracyCoin holds 139/141, nestest 0-diff**. The
+  `mmc3-m2-phase-irq` experiment was evaluated for the same treatment and
+  deliberately **kept**: it gates real alternate MMC3-IRQ-timing behaviour (with
+  `#[cfg(not)]` shipped-path counterparts) and remains tied to the still-open
+  R1/R2 residual investigation (ADR 0002, by-design-deferred, not closed).
+
+### Changed
+
+- **`docs/performance.md`** gains a v2.0.1 `full_frame` measure-first entry:
+  the end-to-end headless frame cost is re-measured and confirmed far under the
+  16.639 ms NTSC budget and against the ≤2 ms/frame target; per the standing
+  >3%-Criterion-stable + byte-identical bar (v1.7.0 H7 precedent), **no
+  optimization was adopted**.
+- **`docs/adr/0030`** records that both bounded v2.0.1 AccuracyCoin ALE/hybrid
+  attempts — Option 2 (`mc-ppu-bus-addr-hybrid`, PR #234) and Option 1 (the
+  2-cycle-ALE draft, PR #236) — reached only 139/141 flag-on, empirically
+  confirming the fix needs a dedicated Timebase-scale campaign, not a bounded
+  fork. **139/141 is the honest v2.0.1 baseline.**
+- **`docs/STATUS.md`** feature-flags section updated: the DMC-abort-probe removal
+  is now recorded as done, and the new default-off v2.0.1 experiments
+  (`mc-ppu-bus-addr-hybrid`, ADR 0030; `mmc3-m2-phase-irq`, ADR 0002) are listed
+  among the genuinely-remaining flags.
 
 ## [2.0.0] - 2026-07-03 - "Timebase" (one-clock master-clock rewrite + Vs. DualSystem)
 
 
@@ -23,9 +23,6 @@ workspace = true
 # would then quietly opt every consumer in to `std`, masking no_std regressions
 # from cross-target CI gates that build with `--no-default-features`.
 std = []
-# v2.0 R-1 core C-1 DIAGNOSTIC: gated pub-static atomic counters that pin
-# where the explicit-DMC-abort scheduling diverges under R1. Default-off.
-mc-r1-dmc-abort-probe = []
 
 [dependencies]
 bitflags.workspace = true
 
@@ -49,10 +49,6 @@ mod snapshot;
 mod triangle;
 
 pub use apu::{Apu, ApuBus, CHANNEL_GAIN_UNITY, CHANNEL_MASK_ALL};
-// v2.0 R-1 core C-1 diagnostic — re-export the gated abort-scheduling probe
-// counters so the harness can read `rustynes_core::rustynes_apu::abort_probe`.
-#[cfg(feature = "mc-r1-dmc-abort-probe")]
-pub use apu::abort_probe;
 pub use blip::{BlipBuf, CPU_HZ_NTSC, CPU_HZ_PAL};
 pub use dmc::Dmc;
 pub use dmc::REENABLE_BUMP;
 
@@ -42,8 +42,6 @@ ppu-state-trace = ["std", "rustynes-ppu/ppu-state-trace"]
 # `scripts/mesen2_cpu_boot_trace.lua` for the Mesen2 reference
 # generator.
 cpu-boot-trace = ["std"]
-# v2.0 R-1 core C-1 diagnostic — forward to rustynes-apu. Default-off.
-mc-r1-dmc-abort-probe = ["rustynes-apu/mc-r1-dmc-abort-probe"]
 # v2.0.1 (ADR 0030) — EXPERIMENTAL persistent-PPU-bus-address model (Option 2). Forward
 # to rustynes-ppu. Default-off; the shipped build is byte-identical without it.
 mc-ppu-bus-addr-hybrid = ["rustynes-ppu/mc-ppu-bus-addr-hybrid"]
 
@@ -3350,12 +3350,6 @@ impl LockstepBus {
     /// where 6502 core address bits 15..=5 remain from the halted CPU read
     /// while DMA supplies address bits 4..=0.
     fn dmc_dma_read(&mut self, addr: u16, halted_addr: u16) -> u8 {
-        #[cfg(feature = "mc-r1-dmc-abort-probe")]
-        {
-            #[allow(clippy::cast_possible_truncation)]
-            let c = self.cycle as u32;
-            rustynes_apu::abort_probe::log_get(c, addr);
-        }
         let sample = self.raw_cpu_read(addr);
         if matches!(self.apu_region(), ApuRegion::Pal) || (halted_addr & 0xFFE0) != 0x4000 {
             return sample;
@@ -3704,12 +3698,6 @@ impl LockstepBus {
         };
         self.last_read_addr = addr;
         self.open_bus = v;
-        #[cfg(feature = "mc-r1-dmc-abort-probe")]
-        if addr == 0x4000 && (48_000_000..=48_700_000).contains(&self.cycle) {
-            #[allow(clippy::cast_possible_truncation)]
-            let c = self.cycle as u32;
-            rustynes_apu::abort_probe::log_4000_read(c, v);
-        }
         // Mirror the read onto the internal data bus, but ONLY when
         // this is a CPU-initiated access.  DMC DMA fetches drive
         // only the EXTERNAL (`open_bus`) bus per nesdev's two-bus
@@ -4025,15 +4013,7 @@ impl Bus for LockstepBus {
             0x0000..=0x1FFF => self.ram[(addr & 0x07FF) as usize] = value,
             0x2000..=0x3FFF => self.ppu_register_write(addr, value),
             REG_OAM_DMA => self.dma_pending = Some(value),
-            0x4000..=0x4013 | 0x4015 | 0x4017 => {
-                #[cfg(feature = "mc-r1-dmc-abort-probe")]
-                if addr == 0x4010 {
-                    #[allow(clippy::cast_possible_truncation)]
-                    let c = self.cycle as u32;
-                    rustynes_apu::abort_probe::log_4010(c, value);
-                }
-                self.apu.write_register(addr, value);
-            }
+            0x4000..=0x4013 | 0x4015 | 0x4017 => self.apu.write_register(addr, value),
             0x4016 => {
                 // Session-24 / Phase 3 (Controller Strobing): the
                 // controllers' OUT pins are only updated at the start
 
@@ -39,8 +39,6 @@ ppu-state-trace = ["rustynes-core/ppu-state-trace"]
 # The export is output-only, so AccuracyCoin / nestest / blargg / kevtris must
 # be identical with this on. Off by default (the CI gate stays the stock build).
 hd-pack = ["rustynes-core/hd-pack"]
-# v2.0 R-1 core C-1 diagnostic — forward to rustynes-core. Default-off.
-mc-r1-dmc-abort-probe = ["rustynes-core/mc-r1-dmc-abort-probe"]
 # v2.0.1 (ADR 0030) — EXPERIMENTAL persistent-PPU-bus-address model (Option 2). Forward
 # to rustynes-core so the AccuracyCoin battery can run with the flag on.
 mc-ppu-bus-addr-hybrid = ["rustynes-core/mc-ppu-bus-addr-hybrid"]
 
@@ -192,99 +192,6 @@ fn main() -> ExitCode {
     }
     println!();
 
-    #[cfg(feature = "mc-r1-dmc-abort-probe")]
-    {
-        use core::sync::atomic::Ordering::Relaxed;
-        use std::fmt::Write as _;
-
-        // Φ-2 hang diagnostic: how many DMAs hit the >60-step escape (GET never
-        // fired = wedge), and the put_cycle parity at the hang.
-        println!(
-            "  Φ-2 HANG: count={} put_cycle_at_hang={} | arms={} get_total={}",
-            rustynes_core::rustynes_apu::abort_probe::HANG_COUNT.load(Relaxed),
-            rustynes_core::rustynes_apu::abort_probe::HANG_PUT.load(Relaxed),
-            rustynes_core::rustynes_apu::abort_probe::ARM_COUNT.load(Relaxed),
-            rustynes_core::rustynes_apu::abort_probe::GET_TOTAL.load(Relaxed),
-        );
-
-        use rustynes_core::rustynes_apu::abort_probe;
-        // W3-Stage-4: how often the consume-edge-quantization suppression
-        // latched (expected: ONLY the Implicit $540 X=8/9 restart races).
-        println!(
-            "  EDGE_SUPPRESS_SET = {}",
-            abort_probe::EDGE_SUPPRESS_SET.load(Relaxed),
-        );
-        // final lever #1: dump the boundary-cycle DMC state captures.
-        let nd = (abort_probe::SUBPOS_DIAG_IDX.load(Relaxed) as usize).min(63);
-        if nd > 0 {
-            println!("  SUBPOS_DIAG blocks (prev2/prev1/cur per block), n={nd}:");
-            for i in 0..nd {
-                let p = abort_probe::SUBPOS_DIAG[i].load(Relaxed);
-                let apu_phase = p & 1;
-                let needs = (p >> 1) & 1;
-                let buf = (p >> 2) & 1;
-                let cannot = (p >> 4) & 0xFF;
-                let bytes = (p >> 12) & 0xFFF;
-                let bits = (p >> 24) & 0xFF;
-                let timer = (p >> 32) & 0xFFFF;
-                let tag = match i % 3 {
-                    0 => "prev2",
-                    1 => "prev1",
-                    _ => "CUR  ",
-                };
-                println!(
-                    "    [{i:>2}] {tag} apu_phase={apu_phase} timer={timer} bits={bits} bytes={bytes} buf={buf} needs_dma={needs} cannot_run={cannot}"
-                );
-            }
-        }
-        println!("\n--- explicit-DMC-abort scheduling probe (C-1 diagnostic) ---");
-        for (label, v) in abort_probe::snapshot() {
-            println!("  {label:<26} {v}");
-        }
-        // Φ-1: RustyNES $4010=$4E -> first $FFC0 GET offsets (TriCNES = 48).
-        let no = (abort_probe::FFC0_OFF_IDX.load(Relaxed) as usize).min(64);
-        let offs: Vec<u32> = (0..no)
-            .map(|i| abort_probe::FFC0_OFF[i].load(Relaxed))
-            .collect();
-        println!("  Φ-1 $4E->$FFC0-GET offsets (n={no}, TriCNES=48): {offs:?}");
-        // Φ-1 period: $FFC0 GET-to-GET (TriCNES CheckDMATiming region = 576).
-        let np = (abort_probe::FFC0_PERIOD_IDX.load(Relaxed) as usize).min(128);
-        let pers: Vec<u32> = (0..np)
-            .map(|i| abort_probe::FFC0_PERIOD[i].load(Relaxed))
-            .collect();
-        println!("  Φ-1 $FFC0 reload PERIOD (n={np}, TriCNES=576): {pers:?}");
-        // Φ-2: dump all $4000 reads (cycle,value) to CSV for the setup-window diff.
-        let r4 = (abort_probe::R4000_IDX.load(Relaxed) as usize).min(4096);
-        if let Ok(out) = std::env::var("RUSTYNES_R4000_LOG") {
-            if !out.is_empty() {
-                let mut s = String::from("cycle,val\n");
-                for i in 0..r4 {
-                    let p = abort_probe::R4000_LOG[i].load(Relaxed);
-                    let _ = writeln!(s, "{},{:02X}", (p & 0xFFFF_FFFF) as u32, (p >> 32) as u8);
-                }
-                std::fs::write(&out, &s).expect("write r4000");
-                println!("  Φ-2 $4000 reads: {r4} -> {out}");
-            }
-        }
-        // Dump the per-$4015-write event log to CSV for trajectory analysis.
-        let n = (abort_probe::EVLOG_IDX.load(Relaxed) as usize).min(abort_probe::EVLOG_CAP);
-        let mut csv = String::from("idx,cpu_cycle,enable,bytes_remaining,timer\n");
-        for i in 0..n {
-            let cyc = abort_probe::EVLOG_CYCLE[i].load(Relaxed);
-            let meta = abort_probe::EVLOG_META[i].load(Relaxed);
-            let enable = (meta >> 31) & 1;
-            let bytes = (meta >> 16) & 0x7FFF;
-            let timer = meta & 0xFFFF;
-            let _ = writeln!(csv, "{i},{cyc},{enable},{bytes},{timer}");
-        }
-        let out = std::env::var("RUSTYNES_ABORT_EVLOG").unwrap_or_default();
-        if !out.is_empty() {
-            std::fs::write(&out, &csv).expect("write evlog");
-            println!("  evlog: {n} events -> {out}");
-        }
-        println!();
-    }
-
     println!(
         "CheckDMATiming Y (normal DMA, must == 4 to pass the abort gate): {}",
         check_dma_timing_y.map_or_else(|| "(unset)".to_string(), |y| format!("{y}"))
 
@@ -903,7 +903,12 @@ pirate carts, niche boards) is documented in `docs/compatibility.md`.
 
 ## Feature flags
 
-> **v2.0.1 update:** the entire `mc-r1-*` / `mc-ppu-*` family + `cpu-{stack,implied}-dummy-reads`
+> **v2.0.1 update:** the last diagnostic hold-over from the v2.0.0 Timebase work —
+> the DMC-DMA-abort probe `mc-r1-dmc-abort-probe` — has now been **removed** (it
+> gated only default-off pub-static atomic counters and a diagnostic bin block, no
+> shipped behaviour; the default build is byte-identical, AccuracyCoin unchanged).
+> Earlier in the v2.0.0 collapse, most of the `mc-r1-*` / `mc-ppu-*` family +
+> `cpu-{stack,implied}-dummy-reads` were already retired or unconditionalised:
 >
 > - the PPU-accuracy trio (`ppu-oam-data-bus`, `ppu-sprite-shifter-counter`,
 > `ppu-2002-read-end-flags`) + `accuracycoin-sprite-eval-base-from-oamaddr` are
@@ -913,8 +918,13 @@ pirate carts, niche boards) is documented in `docs/compatibility.md`.
 > `mc-r1-coldboot-ppuoffset`, `mc-r1-bp-ppu-offset`, `dmc-get-put-scheduler`) were
 > deleted. The rows below for any removed flag are **historical** (v2.0.0-era). The
 > flags that REMAIN: `std`, `serde`, `test-roms`, `commercial-roms`, `mapper-audio`,
-> `wasm-winit`/`wasm-canvas`, and the diagnostics `irq-timing-trace`,
-> `ppu-state-trace`, `cpu-boot-trace`, `cpu-instr-cycle-trace`, `mc-r1-dmc-abort-probe`.
+> `wasm-winit`/`wasm-canvas`, the diagnostics `irq-timing-trace`, `ppu-state-trace`,
+> `cpu-boot-trace`, `cpu-instr-cycle-trace`, and two default-off v2.0.1 experiments:
+> `mc-ppu-bus-addr-hybrid` (v2.0.1, ADR 0030 — the EXPERIMENTAL persistent-PPU-bus-
+> address model for the AccuracyCoin ALE-read pair; shipped build byte-identical
+> without it) and `mmc3-m2-phase-irq` (the still-open R1/R2 MMC3-IRQ-timing residual
+> experiment per ADR 0002 — retained because it gates real alternate behaviour and
+> the residual is by-design-deferred, not closed).
 
 | Flag | Crate(s) | Default | Purpose |
 |------|----------|---------|---------|
 
@@ -181,3 +181,31 @@ long-term branch — regardless of whether Option 2 succeeds** (per the maintain
   AccuracyCoin PPU tests"). Sequencing: **Option 2 (PR B3) first** — Hybrid Addresses before
   ALE+Read — then the **Option 1 branch** as the enduring physically-correct model. This ADR
   is updated (or superseded) when either track lands and the figure returns to 141/141.
+
+## Update — 2026-07-08 (both bounded v2.0.1 attempts made; neither converged)
+
+Both v2.0.1 tracks laid out in the Decision were attempted under a bounded effort, and
+**neither converged** — the honest **139/141 (98.58%)** figure stands as the v2.0.1 baseline:
+
+- **Option 2 — Mesen2 persistent-bus-address model.** Landed as **PR #234** behind the
+  default-off feature flag `mc-ppu-bus-addr-hybrid` (`rustynes-ppu` → forwarded through
+  `rustynes-core` and `rustynes-test-harness`). It adds the persistent `bus_addr` register
+  and the render-time `$2006`/`$2007` reroute, but flag-**on** it still reaches only **139/141**
+  (both "ALE + Read" `$0491` and "Hybrid Addresses" `$0492` continue to fail): the implicit
+  bus-address retention does not reproduce the sub-cycle octal-latch sequence the two tests
+  require without also disturbing the currently-passing `$2007 Stress` path.
+- **Option 1 — 2-cycle-ALE fetch refactor.** Attempted as **draft PR #236** on branch
+  `feat/v2.0.1-option1-2cycle-ale`. The physically-correct two-dot bus model likewise reaches
+  only **139/141** flag-on within the bounded attempt — the fetch-cadence recalibration needed
+  to light exactly the right pixels without shifting sprite-zero / A12 / MMC3 timing is not
+  achievable as a bounded fork.
+
+In **both** cases the flag-**OFF** (shipped) build is **byte-identical** to the v2.0.1
+AccuracyCoin re-sync baseline — **139/141, nestest 0-diff, AccuracyCoin otherwise 100%** —
+so the non-converging experiments never touch the shipped core. This empirically **confirms
+this ADR's central thesis**: the fix is not reachable by a bounded fork of either shape; it
+needs a **dedicated Timebase-scale campaign** that models the per-cycle PPU bus *inside* the
+one-clock scheduler (ADR 0029), calibrated against the vendored `ref-proj/Mesen2` per-cycle
+bus-stream cross-diff oracle and gated on the full regression battery. Until that campaign is
+scheduled, **139/141 is the honest v2.0.1 baseline** and both flags remain default-off
+experiments. The two draft branches are retained as the starting point for that campaign.