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opt-verilog returns an index-out-of-bounds error for some netlists #205

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@jk2997

I think I encountered a new bug in EqMap when I tried to run the command opt-verilog i9_eqmap.v i9_result.v. The opt-verilog script runs parse-verilog and then runs eqmap_fpga on the netlist produced by parse-verilog, but eqmap_fpga returns an error message along the lines of index out of bounds: the len is 280 but the index is 288.  The error occurs during the third call to fold_expr_greedily() in the canonicalize_expr() function in lut.rs. fold_expr_greedily() repeatedly calls fold_node_into() on a RecExpr of length 280 (the input RecExpr represented by the expr parameter) until the output RecExpr dest exceeds expr in the number of nodes it contains. This eventually leads the LutLang::deep_equals() method to panic as the if condition

if !expr[*a].deep_equals(&expr[*b], expr) {
   return false;
}

attempts to retrieve a LutLang node from the RecExpr expr whose Id is greater than the node length of expr. I think the error is being caused because the output RecExpr dest in fold_node_into() grows to have a node length that is larger than that of the input RecExpr expr, even though it is not supposed to.

i9_eqmap.v.txt

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