Skip to content

Commit 7541204

Browse files
committed
Merge branch 'lstopo-translator' of https://github.com/Keysight/infragraph into lstopo-translator
2 parents 2cb018c + 081e0d5 commit 7541204

5 files changed

Lines changed: 6 additions & 6 deletions

File tree

api/info.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ info:
2020
Contributions to the API and models schema can be made in the following ways:
2121
- [open an issue](https://github.com/keysight/infragraph/issues) in the models repository
2222
- [fork the models repository](https://github.com/keysight/infragraph) and submit a PR
23-
version: 0.7.1
23+
version: 0.7.2
2424
contact:
2525
url: https://github.com/keysight/infragraph/issues
2626
license:

artifacts/infragraph.proto

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
/* InfraGraph 0.7.1
1+
/* InfraGraph 0.7.2
22
* ### Overview
33
* InfraGraph or `infrastructure graph` defines a model-driven, vendor-neutral, standard
44
* interface for capturing a system of systems suitable for use in co-designing AI/HPC

artifacts/openapi.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ info:
2020
Contributions to the API and models schema can be made in the following ways:
2121
- [open an issue](https://github.com/keysight/infragraph/issues) in the models repository
2222
- [fork the models repository](https://github.com/keysight/infragraph) and submit a PR
23-
version: 0.7.1
23+
version: 0.7.2
2424
contact:
2525
url: https://github.com/keysight/infragraph/issues
2626
license:

docs/src/openapi.html

Lines changed: 2 additions & 2 deletions
Large diffs are not rendered by default.

src/infragraph/blueprints/devices/nvidia/dgx.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -506,7 +506,7 @@ def _wire_xpu(self):
506506
return
507507

508508
if self.profile == "dgx_h100":
509-
e = self.edges.add(DeviceEdge.MANY2MANY, self.pcie.name)
509+
e = self.edges.add(DeviceEdge.MANY2MANY, self.xpu_fabric.name)
510510
e.ep1.component = f"{self.nvsw.name}[0:4]"
511511
e.ep2.component = f"{self.xpu.name}[0:8]"
512512

0 commit comments

Comments
 (0)